1. Field of the Invention
The present invention relates to a power generator circuit and generation method for generating a positive or negative power supply voltage, an active matrix type liquid crystal display device (LCD) and relates in particular to a liquid crystal display integrated-with-drive circuit.
2. Description of the Related Art
In recent years, many demands have been made for liquid crystal display devices operating on a low voltage, and having high image quality and high performance such as high contrast. These demands for high contrast and for low voltage operation however, generally conflict with each other. In other words, the video signal amplitude input to the liquid crystal display LCD has to be increased in order to increase the contrast. As a result, the voltage for driving the LCD becomes higher so that low voltage operation cannot be achieved. Conversely, attenuating the video signal amplitude to achieve low voltage operation has the effect of reducing the contrast (See FIG. 23A and FIG. 23B).
Whereupon, in order to simultaneously satisfy the dual requirements of high contrast and low voltage operation, a method was employed that lowered the low voltage (VL) of the video signal as much as possible (in other words, to nearly ground potential), lowered the center value (VD) of the video signal, and also lowered the high voltage (VH) of the video signal while raising the dynamic range of the video signal.
However, when this method is employed, in the pixel transistor of the equalizer circuit shown in FIG. 24, when the threshold voltage Vth of a pixel transistor 101 holding the high voltage (VH) of the video signal, approaches the depression, and the scan line (gate line) 102 is zero (0) volts and the source line 103 is at a low level (hereafter listed as xe2x80x9cLxe2x80x9d level), then the pixel transistor 101 may leak as shown in FIG. 25, forming a so-called leak luminance spot. An example of this characteristic of the pixel transistor 101 is shown in FIG. 26.
The above mentioned method was therefore not employed up until now and either high contrast or low voltage operation was selected for use on a case-by-case basis. However, it is known that if the xe2x80x9cLxe2x80x9d level of the scan line 102 can be set to a minus (negative) value, then an ample margin versus these leak luminance spots can be obtained. However, to obtain this minus (negative) value, a negative power generator circuit must be provided to set the scan line 102 to a minus (negative) value. In the related art, this negative power generator circuit had to be installed outside the LCD panel creating the additional burden of set design.
Also, in the case of an LCD using the dot sequential scanning method, the problem arose of different write times onto the pixel during horizontal scanning at the scanning start side (for instance, the left side of the panel) and the scanning end side (for instance, the right side of the panel). In other words, with a panel write time of about 1H (approximately 63 xcexcsec) on the left side of the panel, a write time of several seconds (for instance 5 xcexcsec) was needed to extinguish the gate select pulse, immediately after write was finished on the right side of the panel.
Therefore, in an LCD using the dot sequential scanning method, when a transistor having poor device characteristics was utilized as the pixel transistor 101, the write times on the left side and right side of the panel were different, because of the short write time on the right side of the panel, so that the pixel transistor 101 could not turn off sufficiently. Writing omissions therefore occurred so that the luminance was different on the right and left sides of the panel, in turn creating the problem of poor image quality.
In view of the above problems with the related art, it is therefore an object of the present invention to provide a power supply generation method, a power generator circuit with a simple structure for generating a power supply voltage, and a liquid crystal display device (LCD) that along with having an expanded dynamic range for the input signal, has good image quality and does not require the installation of a power generator circuit outside the LCD panel section.
The power generator circuit of this invention has a structure comprised of a first clamping means to clamp the high level or low level of a clock pulse having a phase opposite the phase of the input clock to a reference voltage level at (or lower than) ground level or to a positive reference voltage level, a second clamping means to clamp the high level or low level of a clock pulse having a positive phase versus the phase of the input clock to a reference voltage level at (or lower than) ground level or to a positive reference voltage level, and a sampling means to sample the high level or low level of the clamped output of the first clamping means, and the high level or low level of the clamped output of the second clamping means. This power generator circuit is formed on the panel (circuit board) of the liquid crystal display integrated-with-drive circuit.
In the above mentioned power generator circuit and liquid crystal display device, the high or low level of a clock having a reversed or positive phase versus the input clock is clamped to a reference voltage level at (or below) ground level or to a positive reference voltage level, and by sampling the high level or low level side of the positive phase clamped clock at the low level or high level of the reversed phase of the clamped clock, a negative power supply voltage with respect to the reference level is generated when clamped at the high level of the clock, and a positive power supply voltage higher than the power supply voltage by an amount equal to the reference voltage level is generated when clamped at the low level of the clock.